ICS8344I Datasheet, PDF (9/16 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS8344I
LOW SKEW, 1-TO-24
DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
TABLE 5C. AC CHARACTERISTICS, V_DD = V_DDO = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
f
Maximum Output Frequency
MAX
tp_LH
Propagation Delay,
Low to High; NOTE 1
f ≤ 100MHz
2.7
100
MHz
4.3
ns
tp_HL
Propagation Delay,
High to Low; NOTE 1
f ≤ 100MHz
2.7
4.3
ns
tsk(b) Bank Skew; NOTE 2, 6
150
ps
tsk(o) Output Skew; NOTE 3, 6
275
ps
tsk(pp) Part-to-Part Skew; NOTE 4, 6
600
ps
t_R
Output Rise Time; NOTE 5
t_F
Output Fall Time; NOTE 5
odc
Output Duty Cycle
30% to 70%
30% to 70%
300
300
40%
1700
ps
1400
ps
60%
%
t_EN
Output Enable Time; NOTE 5
f = 66.7MHz
6
ns
t_DIS
Output Disable TIme; NOTE 5
f = 66.7MHz
6
ns
All parameters measured at 100MHz unless noted otherwise.
NOTE 1: Measured from the diffferential input crossing point to V_DDO/2.
NOTE 2: Defined as skew within a bank of outputs at the same voltages and with equal load conditions.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at V_DDO/2.
NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at V_DDO/2.
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
NOTE 6: This parameter is defined in accordance with JEDEC Standard 65.
8344BYI
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9
REV. A AUGUST 9, 2001