ICS8344I Datasheet, PDF (2/16 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS8344I
LOW SKEW, 1-TO-24
DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2, 5, 6
7, 8, 11, 12
Q16, Q17, Q18, Q19
Q20, Q21, Q22, Q23
Output
Q16 thru Q23 outputs. 7Ω typical output impedance.
3, 9, 28,
34, 39, 45
4, 10, 14,18,
27, 33, 40, 46
13
15, 19
16
17
20
21
22
23
24
25, 26, 29, 30
31, 32, 35, 36
37, 38, 41, 42
43, 44, 47, 48
V_DDO
GND
CLK_SEL
V_DD
nCLK1
CLK1
nCLK0
CLK0
OE3
OE2
OE1
Q0, Q1, Q2, Q3
Q4, Q5, Q6, Q7
Q8, Q9, Q10, Q11
Q12, Q13, Q14, Q15
Power
Power
Input
Power
Input
Input
Input
Input
Input
Input
Input
Output
Output
Output supply pins. Connect 3.3V or 2.5V.
Power supply ground. Connect to ground.
Clock select input. When HIGH, selects CLK1, nCLK1 inputs.
Pulldown When LOW, selects CLK0, nCLK0.
LVTTL / LVCMOS interface levels.
Positive supply pins. Connect 3.3V or 2.5V.
Pullup Inverting differential clock input.
Pulldown Non-inverting differential clock input..
Pullup Inverting differential clock input.
Pulldown Non-inverting differential clock input..
Pullup
Pullup
Pullup
Output enable. Controls enabling and disabling of outputs
Q16 thru Q23.
Output enable. Controls enabling and disabling of outputs
Q8 thru Q15.
Output enable. Controls enabling and disabling of outputs
Q0 thru Q7.
Q0 thru Q7 outputs. 7Ω typical output impedance.
Q8 thru Q15 outputs. 7Ω typical output impedance.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
C_PD
R_PULLUP
R_PULLDOWN
R_OUT
Parameter
CLK0, nCLK0,
Input
CLK1, nCLK1
Capacitance CLK_SEL,
OE1, OE2, OE3
Power Dissipation Capacitance
(per output)
Input Pullup Resistor
Input Pulldown Resistor
Output Impedance
Test Conditions
Minimum Typical Maximum Units
4
pF
4
pF
20
pF
51
KΩ
51
KΩ
7
Ω
8344BYI
www.icst.com/products/hiperclocks.html
2
REV. A AUGUST 9, 2001