ICS950227 Datasheet, PDF (8/17 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for P4

Integrated
Circuit
Systems, Inc.
ICS950227
I²C Table: VCO Frequency Control Register
Byte 12
Pin #
Name
Control Function
Type
0
Bit 7
-
N Div7
RW
-
Bit 6
-
N Div6
The decimal
RW
-
Bit 5
-
N Div5
representation of N Div
RW
-
Bit 4
-
N Div4
(8:0) is equal to VCO
RW
-
Bit 3
-
N Div3
divider value. Default
RW
-
Bit 2
-
Bit 1
-
N Div2
at power up = latch-in
RW
-
N Div1
or Byte 0 Rom table.
RW
-
Bit 0
-
N Div0
RW
-
1
PWD
-
X
-
X
-
X
-
X
-
X
-
X
-
X
-
X
I²C Table: Spread Spectrum Control Register
Byte 13
Pin #
Name
Control Function
Type
0
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
SSP7
RW
-
SSP6
These Spread
RW
-
SSP5
Spectrum bits will
RW
-
SSP4
program the spread
pecentage. It is
RW
-
SSP3
recommended to use
RW
-
SSP2
ICS Spread % table for
RW
-
SSP1
spread programming.
RW
-
SSP0
RW
-
I²C Table: Spread Spectrum Control Register
Byte 14
Pin #
Name
Control Function
Type
0
Bit 7
-
Bit 6
-
Bit 5
-
Reserved
Reserved
SSP13
Reserved
RW
-
Reserved
RW
-
RW
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
SSP12
It is recommended to
RW
-
SSP11
use ICS Spread %
RW
-
SSP10
table for spread
RW
-
SSP9
programming.
RW
-
SSP8
RW
-
1
PWD
-
X
-
X
-
X
-
X
-
X
-
X
-
X
-
X
1
PWD
-
0
-
0
-
X
-
X
-
X
-
X
-
X
-
X
I²C Table: Output Divider Control Register
Byte 15
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
-
-
-
-
-
-
Name
Reserved
Reserved
Reserved
Reserved
CPU Div3
CPU Div2
CPU Div1
CPU Div0
Control Function
Reserved
Reserved
Reserved
Reserved
CPU divider ratio can
be configured via these
4 bits individually.
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
-
-
-
-
-
-
-
-
See Table 3: Divider Ratio
Combination Table 2-3-5-7
PWD
0
0
0
0
X
X
X
X
I²C Table: Output Divider Control Register
Byte 16
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
-
-
-
-
-
-
Name
Reserved
Reserved
Reserved
Reserved
3V66 Div3
3V66 Div2
3V66 Div1
3V66 Div0
Control Function
Reserved
Reserved
Reserved
Reserved
3V66 divider ratio can
be configured via these
4 bits individually.
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
-
-
-
-
-
-
-
-
See Table 3: Divider Ratio
Combination Table
PWD
0
0
0
0
X
X
X
X
0641D—07/03/03
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