ICS93716 Datasheet, PDF (8/12 Pages) Integrated Circuit Systems – Low Cost DDR Phase Lock Loop Clock Driver

ICS9371 6
CLK_INC
CLK_INT
FB_INC
FB_INT
Y_X#
Y_X
Y_X, FB_OUTC
Y_X, FB_OUTT
Y_X, FB_OUTC
Y_X, FB_OUTT
Y_X, FB_OUTC
Y_X, FB_OUTT
0420E—04/01/03
Parameter Measurement Information
t( _{) n}
n=N
t( ₎₌
1 ^t( ) n
N
(N is a large number of samples)
Figure 4. Static Phase Offset
t _{( ) n+1}
t_(skew)
Figure 5. Output Skew
t_C(n)
1
f_O
t_{(jit_per) =}
t_{c(n) -}
1
f_O
Figure 6. Period Jitter
8