ICS844101I-312 Datasheet, PDF (8/13 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO-LVDS 312.5MHZ FREQUENCY MARGINING SYNTHESIZER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844101I-312
FEMTOCLOCKS™ CRYSTAL-TO-LVDS
312.5MHZ FREQUENCY MARGINING SYNTHESIZER
PARAMETER MEASUREMENT INFORMATION
3.3V
Power Supply
Float GND
+
-
LVDS
3.3V
2.5V
SCOPE
Qx
LVDS
nQx
SCOPE
Qx
nQx
++ –
POWER
SUPPLY
Float GND
3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT
Phase Noise Plot
nQ
Phase Noise Mask
Q
t _PW
t
PERIOD
f₁ ^{Offset Frequency} f₂
RMS Jitter = Area Under the Masked Phase Noise Plot
odc = ^{t PW} x 100%
t _PERIOD
RMS PHASE JITTER
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
V_DD
80%
80%
out
V_{SW I N G}
Clock
20%
Outputs
t_R
20%
t_F
DC Input LVDS
out
➤
V_OS/Δ V_OS
OUTPUT RISE/FALL TIME
V_DD
DC Input LVDS
DIFFERENTIAL OUTPUT VOLTAGE SETUP
844101AGI-312
OFFSET VOLTAGE SETUP
out
➤
100
V_OD/Δ V_OD
out
www.icst.com/products/hiperclocks.html
8
REV. A NOVEMBER 28, 2005