PSICS9169-01 Datasheet, PDF (7/10 Pages) Integrated Circuit Systems – Frequency Generator and Integrated Buffers for Intel Pentium and Pentium ProTM mPs

ICS9169-01
Electrical Characteristics at 5.0 V
V_DD = 4.5 - 5.5 V, T_A = 0 - 70 ^oC unless otherwise stated
PARAMETER
Rise Time¹
Fall Time¹
Rise Time¹
Fall Time¹
Duty Cycle¹
SYMBOL
Tr1
Tf1
Tr2
Tf2
Dt1
AC Characteristics
TEST CONDITIONS
20pF load, 0.8 to 2.0V
PCLK & BCLK
20pF load, 2.0 to 0.8V
PCLK & BCLK
20pF load, 20% to 80%
PCLK & BCLK
20pF load, 80% to 20%
PCLK & BCLK
20pF load @ VOUT = 50% of VDD
MIN
TYP
-
0.55
-
0.52
-
1.2
-
1.1
45
50
Duty Cycle¹
Dt2
20pF load @ VOUT = 1.4 V
50
55
Jitter, One Sigma¹
PCLK & BCLK Clocks; Load=20pF;
Tj1s1
R=33 Ω FOUT > 25 MHz
-
50
Jitter, Absolute¹
Jitter, One Sigma¹
Jitter, Absolute¹
Input Frequency¹
Logic Input Capacitance¹
Crystal Oscillator
Capacitance¹
Power-on Time¹
Frequency Settling Time¹
Clock Skew Window¹
Clock Skew Window¹
Clock Skew Window¹
PCLK & BCLK Clocks; Load=20pF;
Tjab1
R=33 Ω FOUT > 25 MHz
Fixed CLK; Load=20pF
Tjis2
R=33 Ω
Fixed CLK; Load=20pF
Tjab2
R=33 Ω
Fi
CIN
Logic input pins
CINX
X1, X2 pins
From V=1.6V to 1st crossing of 66.5
ton
MHz VDD supply ramp < 40 ms
From 1st crossing of acquisition to
ts
< 1% settling
PCLK to PCLK;
Tsk1
Load=20pF; @1.4V
BCLK to BCLK;
Tsk2
Load=20pF; @1.4V
PCLK to BCLK;
Tsk3
Load=20pF; @1.4V
-250
-
-
1
-5
2
12.0
14.318
-
5
-
18
-
2.5
-
2.0
-
150
-
300
1
2.6
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
MAX
0.95
0.90
2.1
2.0
55
60
150
250
3
5
16.0
-
-
4.5
4.0
250
500
5
UNITS
ns
ns
ns
ns
%
%
ps
ps
%
%
MHz
pF
pF
ms
ms
ps
ps
ns
7