PSICS9169-01 Datasheet, PDF (6/10 Pages) Integrated Circuit Systems – Frequency Generator and Integrated Buffers for Intel Pentium and Pentium ProTM mPs

General Layout Precautions:
1) Use a ground plane on the top layer
of the PCB in all areas not used by
traces.
2) Make all power traces and vias as
wide as possible to lower inductance.
Notes:
1) All clock outputs should have series
terminating resistor. Not shown in
all places to improve readibility of
diagram.
2) 47 ohm / 56pf RC termination should
be used at 50MHz and higher clock
loads.
3) Optional crystal load capacitors are
recommended.
Capacitor Values:
C1, C2 : Crystal load values determined by user
C3 : 100pF ceramic
All unmarked capacitors are 0.01µF ceramic
Connections to VDD:
ICS9169-01
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