ICS9250-09 Datasheet, PDF (7/12 Pages) Integrated Circuit Systems – Frequency Timing Generator for PENTIUM II Systems

ICS9250-09
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V_DD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Group Offset
Group
O ffse t
CPU to 3V66
0.0-1 .5 ns CPU leads
3V66 to PCI
1.5-4.0n s 3 V66 leads
CPU to IOAPIC
1.5-4 .0 ns CPU leads
No te: 1 . All o ffs ets are to b e measu red at risin g ed g es .
Measurement Loads
CPU @ 20pF, 3V66 @ 30pF
3V66 @ 30pF, PCI @ 30pF
C PU @ 20p F, IOAPIC @ 2 0pF
Measure Points
C PU @ 1.25V, 3V66 @ 1.5V
3V66 @ 1.5V, PC I @ 1.5V
CPU @ 1.25V, IOAPIC @ 1.5V
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70º C; Supply Voltage VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5% (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Input Low Current
Operating
Supply Current
Power Down
Supply Current
V_IH
2
V_DD+0.3 V
V_IL
V_SS-0.3
0.8
V
I_IH
V_IN = V_DD
0.1
5
µA
I_IL1
V_IN = 0 V; Inputs with no pull-up resistors
-5 2.0
µA
I_IL2
V_IN = 0 V; Inputs with pull-up resistors
-200 -100
µA
I_DD3.3OP100 Select @ 100MHz; Max discrete cap loads
I_DD3.3OP133 Select @ 133MHz; Max discrete cap loads
68 180
mA
80
IDD3.3PD CL = 0 pF; PWRDWN# = 0
62 200 uA
Input frequency
F_i
V_DD = 3.3 V
Input Capacitance¹
Transition Time¹
Settling Time¹
Clk Stabilization¹
C_IN
C_INX
T_Trans
T_S
T_Stab
Logic Inputs
X1 & X2 pins
To 1st crossing of target Freq.
From 1st crossing to 1% target Freq.
From V_DD = 3.3 V to 1% target Freq.
1_{Guaranteed by design, not 100% tested in production.}
12 14.318 16
5
27
36
45
3
1
3
MHz
pF
pF
ms
ms
ms
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70º C; Supply Voltage VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5% (unless otherwise stated)
PARAMETER SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Operating
Supply Current
IDD2.5OP66 Select @ 100MHz; Max discrete cap loads
IDD2.5OP100 Select @ 133MHz; Max discrete cap loads
19
25
mA
22
40
1_{Guaranteed by design, not 100% tested in production.}
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