ICS9177 Datasheet, PDF (7/8 Pages) Integrated Circuit Systems – High Frequency System Clock Generator

ICS9177
Table 8: AC Specification type Out D.ttl Pins (12.5 MHz)
PARAMETER
SYMBOL TEST CONDITIONS
MIN
Output High Voltage
Voh
2.4
Output Low Voltage
Vol
0
Output High Current
Ioh
16
Output Low Current
Iol
Rise Time 10-90%
tr
1
Fall Time 10-90%
tf
1
Pin skew to other OutD.ttl
signals
tsk
Duty cycle at 1.5V
dcyc
45
Delay from OutA.pecl signals ¹
tdly
Skew associated with above
delay ²
tdlyskw
TYP
MAX
UNITS
5
3.2
volts
0.8
0.3
volts
mA
24
mA
3
2
ns
3
2
ns
500
250
ps
55
%
.5
ns
±1.3
ns
Test Load Conditions: 500W, 15 pF.
Note 1: Delay is the intrinsic delay between the TTL drivers switching and the PECL driver switching. This is measured from
the OutA.pecl signal at the signal swing mid-point to max output of the OutD.ttl signal’s rising edge
7