ICS9177 Datasheet, PDF (2/8 Pages) Integrated Circuit Systems – High Frequency System Clock Generator

ICS9177
Pin Description
PIN
NUM-
BER
1
PIN
NAME
GND
TYPE
DESCRIPTION
2 REFCLK INPUT from external oscillator
external PLL Feedback path
3 FBCLK INPUT from one of the OutC
outputs
4 DSEL1# INPUT ^{PLL divider mode control}
(Contains internal pull-up
5 DSEL0# INPUT _resistors)
6 TESTEN INPUT Test mode ENABLE pin
7 TSTCLK INPUT External Test Clk
8 NC
9 VCC
10 GND
11 PCOUT1 OUTPUT _{TTL - Group 2}
12 PCOUT0 OUTPUT ^{Programmable clock outputs}
13 GND
14 VCC
15 PBOUT1 OUTPUT _{TTL - Group 1}
16 PBOUT0 OUTPUT ^{Programmable clock outputs}
17 VCC
18 GND
19 PAOUT1 OUTPUT _{TTL - Group 0}
20 PAOUT0 OUTPUT ^{Programmable clock outputs}
21 VCC
22 GND
23 RESETL INPUT Low true divider reset pin
24 BOUT1 OUTPUT
TTL - 50 MHz output clock
25 BOUT0 OUTPUT
26 VCC
27 GND
*Internal pull-up resistor
PIN
NUM-
BER
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
PIN
NAME
COUT2
COUT1
VCC
GND
COUT0
DOUT0
GND
NC
AOUT1
AOUT0
NC
GND
ECL+5V
(same as
VCC)
NC
NC
ANALO-
G +5V
ANALO-
G +5V
AGND
PCSEL1
PCSEL0
PBSEL1
PBSEL0
PASEL1
PASEL0
VC
TYPE
DESCRIPTION
OUTPUT
TTL - 25 MHz output clock
OUTPUT
TTL - 25 MHz output clock
TTL - 12.5 MHz output
clock
OUTPUT ^{ECL - 100 MHz, 75 MHz or}
50 MHz based on DSEL(1:0)
OUTPUT _pins
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
Programmable clock Group
C select
Programmable clock Group
B select
Programmable clock Group
A select
2