ICS848004I Datasheet, PDF (7/11 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO-SSTL_2 FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS848004I
FEMTOCLOCKS™ CRYSTAL-TO-
SSTL_2 FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS848004I provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V_DD, V_DDA, and V_DDO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10µF and a .01μF bypass
capacitor should be connected to each V_DDA.
3.3V
V
DD
.01μF 10Ω
V_DDA
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS848004I has been characterized with 18pF parallel reso- were determined using a 26.5625MHz 18pF parallel resonant
nant crystals. The capacitor values shown in Figure 2 below crystal and were chosen to minimize the ppm error.
X1
18pF Parallel Crystal
XTAL_OUT
C1
33p
XTAL_IN
C2
27p
ICS848004I
Figure 2. CRYSTAL INPUt INTERFACE
848004AGI
www.icst.com/products/hiperclocks.html
7
REV. A AUGUST 18, 2005