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ICS839893I Datasheet, PDF (7/10 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-13 LVCMOS/LVTTL BUFFER DIVIDER
Integrated
Circuit
Systems, Inc.
ICS839893I
LOW SKEW, 1-TO-13
LVCMOS/LVTTL BUFFER DIVIDER
PARAMETER MEASUREMENT INFORMATION
1.65V±5%
1.25V±5%
VDD,
VDDO_A,
V V DDO_B, DDO_C
LVCMOS
GND
SCOPE
Qx
VDD,
VDDO_A,
V V DDO_B, DDO_C
LVCMOS
GND
SCOPE
Qx
-1.65V±5%
3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
-1.25V±5%
2.5V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT
V
DDOX
Qx
2
QX0:QX5
VDDOX
2
V
DDOX
Qy
2
t sk(o)
OUTPUT SKEW
QA0:5,
QB0:5, QC
t PW
V
DDOX
2
t
PERIOD
odc = t PW x 100%
t PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
80%
80%
QX0:QX5
VDDOX
2
t sk(b)
BANK SKEW (where X denotes outputs in the same bank)
Sn
(Low-level
enabling)
1.25V
2.5V
1.25V
0V
tPZH
Output nDPx
(See Note)
tPHZ
1.25V
VOL
VOH
VOH - 0.15V
VOL
NOTE: The output is high except when disabled by the Sn control.
OUTPUT ENABLE/DISABLE TIME
CLK0,
VDD
CLK1
2
20%
Clock
Outputs
tR
OUTPUT RISE/FALL TIME
839893AYI
20%
tF
QA0:QA5,
QB0:QB5,
QC
VDDOX
2
t
PD
PROPAGATION DELAY
www.icst.com/products/hiperclocks.html
7
REV. A AUGUST 8, 2005