ICS839893I Datasheet, PDF (2/10 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-13 LVCMOS/LVTTL BUFFER DIVIDER

Integrated
Circuit
Systems, Inc.
ICS839893I
LOW SKEW, 1-TO-13
LVCMOS/LVTTL BUFFER DIVIDER
TABLE 1. PIN DESCRIPTIONS
Number
1, 12, 16, 20, 24, 29,
32, 37, 41, 45
2
Name
GND
QC
Type
Power
Output
Description
Supply ground.
Bank C output. LVCMOS / LVTTL interface levels.
3, 4, 9, 10, 11, 33, 35
nc
Unused
No connect.
5
V
DDO_C
Power
Output supply pin for Bank C output.
6, 7
CLK0, CLK1 Input Pulldown LVCMOS / LVTTL clock inputs.
8, 25, 36
13, 17, 21
14, 15,
18, 19,
22, 23
26
27,
28,
30,
31
34
38, 39
42, 43,
46, 47
V_DD
V_{DDO_B}
QB5, QB4
QB3, QB2
QB1, QB0
nOE/MR
FSEL3,
FSEL2,
FSEL1,
FSEL0
REF_SEL
QA0, QA1,
QA2, QA3,
QA4, QA5
Power
Power
Core supply pins.
Output supply pins for Bank B outputs.
Output
Bank B outputs. LVCMOS / LVTTL interface levels.
Input
Pulldown
Active High Master Reset. Active Low Output Enable.
When logic LOW, the internal dividers and the outputs are
enabled. When logic HIGH, the internal dividers are reset and
the outputs are tri-stated (HiZ). LVCMOS / LVTTL interface
levels.
Input
Pulldown
Clock frequency selection and configuration of clock divider
modes. LVCMOS / LVTTL interface levels.
Input
Selects the primary reference clock. When LOW, selects CLK0
Pulldown as the primary clock source. When HIGH, selects CLK1 as the
primary clock source. LVCMOS / LVTTL interface levels.
Output
Bank A outputs. LVCMOS / LVTTL interface levels.
40, 44, 48
V_{DDO_A}
Power
Output supply pins for Bank A outputs.
NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R_PULLDOWN
C_PD
Parameter
Input Capacitance
Input Pulldown Resistor
Power Dissipation Capacitance
(per output)
R_OUT
Ouput Impedance
NOTE: V_{DDO_X} denotes V_{DDO_A}, V_{DDO_B}, V_DDO__C.
Test Conditions
V_DD = V_DDA = V_{DDO_x} = 3.465V
V_DD = V_DDA = V_{DDO_x} = 2.625V
Minimum
Typical
4
51
9
9
14
Maximum
Units
pF
kΩ
pF
pF
Ω
839893AYI
www.icst.com/products/hiperclocks.html
2
REV. A AUGUST 8, 2005