ICS83947I-147 Datasheet, PDF (7/10 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-9 LVCMOS/LVTTL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS83947I-147
LOW SKEW, 1-TO-9
LVCMOS/LVTTL FANOUT BUFFER
APPLICATION SCHEMATIC EXAMPLE
Figure 1 shows an example of ICS83947I-147 application sche-
matic. In this example, the device is operated at V =3.3V. The
CC
decoupling capacitors should be located as close as possible
to the power pin. The input is driven by a 3.3V LVCMOS driver.
For the LVCMOS output drivers, only one termination example
is shown in this schematic. Additional termination approaches
are shown in the LVCMOS Termination Application Note (refer
to ICS website).
VCC
R3 43 Zo = 50 Ohm
VDDO
LVCMOS
VCC
R3 43 Zo = 50 Ohm
LVCMOS
VDD=3.3V
VDDO=3.3V
VDD
C5
0.1u
1
2
3
4
5
GND
CLK_SEL
CLK0
CLK1
6
7
8
CLK_EN
OE
VDD
GND
VDDO
(U1-10) (U1-14)
(U1-18)
(U1-22)
(U1-27)
(U1-31)
C1
0.1u
C2
0.1u
C3
0.1u
C4
0.1u
C2
0.1u
C3
0.1u
R1 43
Zo = 50
U1
ICS83947I-147
GND
Q3
VDDO
Q4
24
23
22
21
20
GND
Q5
VDDO
GND
19
18
17
R2 43
Zo = 50
FIGURE 1. ICS83947I-147 SCHEMATIC LAYOUT
83947AYI-147
http://www.icst.com/products/hiperclocks.html
7
REV. A SEPTEMBER 24, 2004