ICS5250708 Datasheet, PDF (7/9 Pages) Integrated Circuit Systems – LVCMOS User Configurable Clock

PRELIMINARY INFORMATION
ICS525-07/08
LVCMOS User Configurable Clock
AC Electrical Characteristics
Unless stated otherwise, VDD = 1.8 V to 2.5 V
Parameter
Symbol
Conditions
Input Frequency
Crystal input
F_IN
Clock input
Output Frequency (ICS525-07)
Output Frequency (ICS525-08)
Output Clock Rise Time
F_OUT
F_OUT
-40 to +85°C
-40 to +85°C
20% to 80%
Output Clock Fall Time
80% to 20%
Output Clock Duty Cycle
at VDD/2
Power-down Time, PD low to
clocks stopped
Power-up Time, PD high to
clocks stable
Absolute Clock Period Jitter,
VDD = 2.5 V
t_ja Deviation from mean
One Sigma Clock Period Jitter,
VDD = 2.5 V
t_js One Sigma
Absolute Clock Period Jitter,
VDD = 1.8 V
t_ja Deviation from mean
One Sigma Clock Period Jitter,
VDD = 1.8 V
t_js
One Sigma
Min.
5
2
10
0.4
45
Typ.
1
1
49 to 51
Max.
27
50
200
200
55
Units
MHz
MHz
MHz
MHz
ns
ns
%
50
ns
5
ms
ps
ps
ps
ps
NOTE 1: Phase relationship between input and output can change at power-up.
MDS 525-07/08 A
7
Revision 101105
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