ICS5250708 Datasheet, PDF (2/9 Pages) Integrated Circuit Systems – LVCMOS User Configurable Clock

PRELIMINARY INFORMATION
Pin Assignment (ICS525-07)
R5
1
R6
2
S0
3
S1
4
S2
5
VDD
6
X1/ICLK
7
X2
8
GND
9
V0
10
V1
11
V2
12
V3
13
V4
14
28
R4
27
R3
26
R2
25
R1
24
R0
23
VDD
22
REF
21
CLK
20
GND
19
PD
18
V8
17
V7
16
V6
15
V5
ICS525-07/08
LVCMOS User Configurable Clock
Pin Descriptions (ICS525-07)
Pin
Number
1, 2,
24-28
3, 4, 5
6, 23
7
8
9, 20
10 - 18
19
21
22
Pin
Name
R5, R6,
R0-R4
S0, S1, S2
VDD
X1/ICLK
X2
GND
V0 - V8
PD
CLK
REF
Pin
Type
I(PU)
Pin Description
Reference divider word input pins.
I(PU)
Power
X1
X2
Power
I(PU)
Input
Output
Output
Select pins for output divider. See table on page 4.
Connect to VDD.
Crystal connection. Connect to a parallel resonant fundamental crystal or input clock.
Crystal connection. Connect to a crystal or leave unconnected for clock.
Connect to ground.
VCO divider word input pins.
Power-down. Active low. Turns off entire chip when low. Clock outputs stop low.
PLL output clock.
Reference output. Buffered crystal oscillator (or clock) output.
KEY: I(PU) = Input with internal pull-up resistor; X1, X2 = crystal connections
MDS 525-07/08 A
2
Revision 101105
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