ICS844252-04 Datasheet, PDF (6/12 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844252-04
FEMTOCLOCKS™ CRYSTAL-TO-
LVDS CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
3.3V±5%
POWER SUPPLY
+ Float GND -
LVDS
Qx ^SCOPE
nQx
Phase Noise Plot
Phase Noise Mask
f₁ ^{Offset Frequency} f₂
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V OUTPUT LOAD AC TEST CIRCUIT
nQx
Qx
nQy
Qy
t sk(o)
OUTPUT SKEW
80%
Clock
20%
Outputs
t_R
OUTPUT RISE/FALL TIME
V_DD
DC Input LVDS
80%
t_F
out
out
RMS PHASE JITTER
nQ0, nQ1
Q0, Q1
t _PW
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
V_DD
V_{SW I N G}
20%
DC Input LVDS
out
➤
100
V_OD/Δ V_OD
out
DIFFERENTIAL OUTPUT VOLTAGE SETUP
➤
V_OS/Δ V_OS
OFFSET VOLTAGE SETUP
844252AG-04
www.icst.com/products/hiperclocks.html
6
REV. A JANUARY 26, 2006