ICS844252-04 Datasheet, PDF (2/12 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844252-04
FEMTOCLOCKS™ CRYSTAL-TO-
LVDS CLOCK GENERATOR
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2
nQ1, Q1
Output
Differential clock outputs. LVDS interface levels.
3, 6
V_DDO
Power
Output supply pins.
Output enable. When HIGH, clock outputs follow clock input.
4
OE
Input Pullup When LOW, Qx outputs are forced low, nQx outputs are forced high.
LVCMOS/LVTTL interface levels.
Selects between the PLL and reference clock as input to the divider.
5
nPLL_SEL
Input Pulldown When Low, selects PLL. When High, selects reference clock.
LVCMOS/LVTTL interface levels.
7, 8
Q0, nQ0
Output
Differential clock outputs. LVDS interface levels.
9
FREQ_SEL Input Pulldown Frequency select pin. LVCMOS/LVTTL interface levels.
10
V_DDA
Power
Analog supply pin.
11
V_DD
Power
Core supply pin.
12
CLK_SEL
Input
Pulldown
Clock select input. When Low, selects crystal inputs. When High,
selects REF_CLK. LVCMOS/LVTTL interface levels.
13
REF_CLK
Input Pulldown Reference clock input. LVCMOS/LVTTL interface levels.
14
GND
Power
Power supply ground.
15, 16
XTAL_OUT,
XTAL_IN
Input
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characterristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C
IN
R_PULLUP
R_PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
844252AG-04
www.icst.com/products/hiperclocks.html
2
REV. A JANUARY 26, 2006