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ICS9173-01 Datasheet, PDF (5/7 Pages) Integrated Circuit Systems – Video Genlock PLL
AV9173- 01
Electrical Characteristics
VDD = +5V ±5%, TA = 0°C to 70°C, unless otherwise stated
PARAMETER
Input Clock Rise Time1
Input Clock Fall Time1
Output Rise Time1
Output Rise time1
Output Fall time1
Output Fall time1
Output Duty Cycle1
Jitter, one sigma1
Jitter, absolute1
Jitter, one sigma1
Jitter, absolute1
Line-to-line jitter,1 absolute2
Input Frequency,1 IN or FBIN
CLK1 Frequency1, 3, 4
AC CHARACTERISTICS
SYMBOL
TEST CONDITIONS
ICLKr
ICLKf
tr1 15pF load; 0.8 to 2.0V
tr2
15pF load;
20% to 80% VDD
tf1 15pF load; 2.0 to 0.8V
tf2
15pF load;
80% to 20% VDD
dt
T1s1
Tabs1
T1s2
Tabs2
15pF load
CLK1 frequency≥ 25 MHz
CLK1 frequency≥ 25 MHz
CLK1 frequency< 25 MHz
CLK1 frequency< 25 MHz
TLabs
fi
fCLK1
See allowable fi below:
12 ≤ fi ≤ 14 kHz
14 < fi ≤ 17 kHz
17 < fi ≤ 30 kHz
30 < fi ≤ 35 kHz
35 < fi ≤ 1000 kHz
MIN TYP MAX UNITS
—
—
10
ns
—
—
10
ns
—
0.6
1.5
ns
—
1.6 3.0
ns
—
1.0 2.0
ns
—
0.9
2.0
ns
40
47
55
%
—
120 250
ps
-400 ±250 400 ps
—
—
1
%
—
—
2
%
—
±4
—
ns
12
— 1000 kHz
44.0 —
75 MHz
30.0 —
75 MHz
25.0 —
75 MHz
15.0 —
75 MHz
10.0 —
75 MHz
Notes:
1. Parameter is guaranteed by design and characterization. Not 100% tested in production.
2. Input Reference Frequency = 25 kHz, Output Frequency = 25 MHz. Jitter measured between adjacent vertical pixels.
3. CLK1 frequency applies for FS = 0. For FS = 1 condition, divide allowable CLK1 range by the factor of 4.
4. An Application Brief (AB01) documents the operation of the AV9173 for low input frequencies. This provides
guidelines for usable output frequencies and feedback ratios required to use inputs below 25 kHz. By following these
guidelines, the AV9173 will operate down to 12 kHz inputs across temperature, voltage and lot-to-lot variation.
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