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ICS9150-02 Datasheet, PDF (5/8 Pages) Integrated Circuit Systems – Pentium Pro and SDRAM Frequency Generator
ICS9150- 02
Preliminary Product Preview
Select Functions
FUNCTION
DESCRIPTION
Tri - State
Test Mode
CPU
Hi-Z
TCLK/21
PCI,
PCI_F
Hi-Z
TCLK/41
Notes:
1. REF is a test clock on the X1 inputs during test mode.
Byte 1: CPU Clock Register
BIT PIN# PWD
DESCRIPTION
Bit 7 -
1 Reserved
Bit 6 -
1 Reserved
Bit 5 -
1 Reserved
Bit 4 46 1 CPUCLK4 (Act/Inact)
Bit 3 48 1 CPUCLK3 (Act/Inact)
Bit 2 49 1 CPUCLK2 (Act/Inact)
Bit 1 51 1 CPUCLK1 (Act/Inact)
Bit 0 52 1 CPUCLK0 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 3: SDRAM Clock Register
BIT PIN# PWD
DESCRIPTION
Bit 7 35 1 SDRAM7 (Act/Inact)
Bit 6 36 1 SDRAM6 (Act/Inact)
Bit 5 38 1 SDRAM5 (Act/Inact)
Bit 4 39 1 SDRAM4 (Act/Inact)
Bit 3 41 1 SDRAM3 (Act/Inact)
Bit 2 42 1 SDRAM2 (Act/Inact)
Bit 1 44 1 SDRAM1 (Act/Inact)
Bit 0 45 1 SDRAM0 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 5: Peripheral Clock Register
BIT PIN# PWD
DESCRIPTION
Bit 7 -
1 Reserved
Bit 6 2 1 REF0 (Act/Inact)
Bit 5 54 1 IOAPIC1 (Act/Inact)
Bit 4 55 1 IOAPIC0 (Act/Inact)
Bit 3 -
1 Reserved
Bit 2 -
1 Reserved
Bit 1 -
1 Reserved
Bit 0 3 1 REF1 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
OUTPUTS
SDRAM
Hi-Z
TCLK/21
REF
Hi-Z
TCLK1
IOAPIC
Hi-Z
TCLK1
Byte 2: PCICLK Clock Register
BIT PIN# PWD
DESCRIPTION
Bit 7 -
1 Reserved
Bit 6 8 1 PCICLK_F (Act/Inact)
Bit 5 16 1 PCICLK5 (Act/Inact)
Bit 4 14 1 PCICLK4 (Act/Inact)
Bit 3 13 1 PCICLK3 (Act/Inact)
Bit 2 12 1 PCICLK2 (Act/Inact)
Bit 1 11 1 PCICLK1 (Act/Inact)
Bit 0 9 1 PCICLK0 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 4: SDRAM Clock Register
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
18
19
-
22
24
25
32
33
PWD
1
1
1
1
1
1
1
1
DESCRIPTION
48 MHz0 (Act/Inact)
48 MHz1 (Act/Inact)
Reserved
SDRAM12 (Act/Inact)
SDRAM11 (Act/Inact)
SDRAM10 (Act/Inact)
SDRAM9 (Act/Inact)
SDRAM8 (Act/Inact)
Byte 6: Peripheral Clock Register
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
-
-
-
-
-
-
-
-
PWD
DESCRIPTION
1 Reserved
1 Reserved
1 Reserved
1 Reserved
1 Reserved
1 Reserved
1 Reserved
1 Reserved
Notes:
1. Byte 6 is reserved by Integrated Circuit Systems for
future applications.
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