ICS8534-01 Datasheet, PDF (5/17 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-22 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS8534-01
LOW SKEW, 1-TO-22
DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
TABLE 4D. LVPECL DC CHARACTERISTICS, V_CC = V_CCO = 3.3V±5%, TA=0°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
PCLK
I_IH
Input High Current
nPCLK
V_CC = V_IN = 3.465V
V = V = 3.465V
CC
IN
PCLK
I_IL
Input Low Current
nPCLK
V_CC = 3.465V, V_IN = 0V
V_CC = 3.465V, V_IN = 0V
-5
-150
V_PP
Peak-to-Peak Input Voltage
0.3
V_CMR
Common Mode Input Voltage; NOTE 1, 2
V_EE + 1.5
V_OH
Output High Voltage; NOTE 3
V_CC - 1.4
V_OL
Output Low Voltage; NOTE 3
V_CC - 2.0
V_SWING
Peak-to-Peak Output Voltage Swing
0.6
NOTE 1: Common mode voltage is defined as V_IH.
NOTE 2: For single ended applications, the maximum input voltage for PCLK and nPCLK is V_CC + 0.3V.
NOTE 3: Outputs terminated with 50Ω to V_CCO - 2V.
Maximum
150
5
1
V_CC
V_CC - 0.9
V_CC -1.7
1.0
Units
µA
µA
µA
µA
V
V
V
V
V
TABLE 5. AC CHARACTERISTICS, V_CC = V_CCO = 3.3V±5%, TA=0°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
f_MAX
Output Frequency
500
t_PD
Propagation Delay; NOTE 1
f ≤ 500MHz
2.0
3.0
tsk(o) Output Skew; NOTE 2, 5
100
tsk(pp) Part-to-Part Skew; NOTE 3, 5
700
Buffer Additive Phase Jitter, RMS;
tjit
refer to Additive Phase Jitter section;
(12KHz to 20MHz)
0.04
NOTE 4
t_R / t_F
t_S
t_H
odc
Output Rise/Fall Time
Setup Time
Hold Time
Output Duty Cycle
20% to 80%
200
700
1.0
0.5
f ≤ 266MHz
48
52
266 < f ≤ 500MHz
46
54
All parameters measured at f_MAX unless noted otherwise.
Special thermal considerations may be required. See Applications Section.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions at the same temperature. Using the same type of inputs on each device,
the outputs are measured at the differential cross points.
NOTE 4: Driving only one input clock.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
Units
MHz
ns
ps
ps
ps
ps
ns
ns
%
%
8534AY-01
www.icst.com/products/hiperclocks.html
5
REV. A NOVEMBER 19, 2004