ICSSSTV16859 Datasheet, PDF (4/8 Pages) Integrated Circuit Systems – DDR 13-Bit to 26-Bit Registered Buffer

ICSSSTV16859
Preliminary Product Preview
Electrical Characteristics - DC
T_A = 0 - 70º C; V_DD = 2.5 V +/-200mV, V_DDQ=2.5V 200mV; (unless otherwise stated)
SYMBOL PARAMETERS
C ONDIT IONS
V_DD
M IN
V_IK
V_OH
V_OL
I_I
All Inputs
Standby (Static)
I_I = -18mA
I_OH = -100µA
I_OH = -16mA
I_OL = 100µA
I_OL = 16mA
V_I = V_DD or GND
RESET# = GND
2 .3 V
2 .3 V-2 .7
2 .3 V
2 .3 -2 .7 V
2 .3 V
2 .7 V
V_DD -0.2
1 .9 5
I_DD
Operating (Static) ^{VI = VIH (AC#) or VIL (AC),}
RESET# = V_DD
Dynamic operating ^{RESET = VDD, VI = VIH(AC)}
clock only
or V_{IL (AC)}, CK and CK#
switching 50% duty cycle. _{IO = 0}
RESET# = V_DD, V_I = V_IH(AC)
I_DDD
or VIL (AC), CK and CK#
2 .7 V
Dynamic Operating switching 50% duty cycle.
per each data input One data input switching at
half clock frequency, 50%
duty cycle
r_OH Output High
r_OL Output Low
I_OH = 20mA
I_OL = 20mA
2 .3 -2 .7 V
7
2 .3 -2 .7 V
7
r_{O(∆ )}
[r_OH - r_OL] each
separate bit
C_i
Data Inputs
CK and CK#
I_O = 20mA, T_A = 25° C
V_I = V_REF ±350Mv
V_ICR = 1.25V, V_I(PP) = 360mV
2 .5 V
2 .5 V
2 .5
2 .5
Notes:
1 - Guaranteed by design, not 100% tested in production.
TYP
M AX
-1 .2
0 .2
0 .3 5
±5
.0 1
TBD
TBD
TBD
20
20
4
3 .5
3 .5
UNITS
V
µA
µA
mA
µ/clock MHz
µA/ clock
M Hz / d at a
Ω
Ω
Ω
pF
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