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ICS93705 Datasheet, PDF (4/7 Pages) Integrated Circuit Systems – DDR Phase Lock Loop Zero Delay Clock Buffer
ICS9370 5
Absolute Maximum Ratings
Supply Voltage (VDD & AVDD) . . . . . . . . . . . -0.5V to 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . 0°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Electrical Characteristics - Input / Supply / Common Output Parameters
TA = 0 - 70°C; Supply Voltage VDD = 2.5 V +/-0.2V (unless otherwise stated)
PARAMETER
Input High Current
Input Low Current
Operating Supply Current
Output High Current
Output High Current
SYMBOL
IIH
IIL
IDD2.5
IDDPD
IOH
IOL
CONDITIONS
VI = VDD or GND
VI = VDD or GND
CL = 0 pF at 133 MHz
CL = 0 pF
VDD = 2.3V, VOUT = 1V
VDD = 2.3V, VOUT = 1.2V
MIN TYP
245
-43
26 43
High Impedance Output
Current
IOZ
VDD = 2.7V, VOUT = VDD or GND
Input Clamp Voltage
VIK
Iin = -18 mA;
High-level Output Voltage
VOH
VDD = min to max, IOH = -1mA
VDD = 2.3V, IOH = -12mA
Low-level Output Voltage
VOL
VDD = min to max, IOH = 1mA
VDD = 2.3V, IOH = 12mA
Input Capacitance1
CIN
VI = VDD or GND
Output Capacitance1
COUT VI = VDD or GND
1 Guaranteed by design, not 100% tested in production.
2.1 2.42
1.87
0.04
0.35
3
MAX UNITS
µA
µA
300 mA
100 µA
-18 mA
mA
10
µA
V
V
V
0.1
V
0.6
V
pF
pF
0418C—08/08 /02
4