ICS9159-14 Datasheet, PDF (4/7 Pages) Integrated Circuit Systems – Frequency Generator and Integrated Buffer for PENTIUM™

ICS9159-14
Electrical Characteristics at 3.3V
V_DD = 3.1 – 3.7 V, T_A = 0 – 70° C
PARAMETER
Rise Time¹
Fall Time¹
Rise Time¹
Fall Time¹
Duty Cycle¹
Jitter, One Sigma¹
Jitter, Absolute¹
Jitter, One Sigma¹
Jitter, Absolute¹
Input Frequency¹
Logic Input Capacitance¹
Crystal Oscillator Capacitance¹
Power-on Time¹
Frequency Settling Time¹
Clock Skew Window¹
Clock Skew Window¹
Clock Skew Window¹
AC Characteristics
SYMBOL TEST CONDITIONS
Tr1 20pF load, 0.8 to 2.0V CPU & BUS
Tf1 20pF load, 2.0 to 0.8V CPU & BUS
Tr2 20pF load, 20% to 80% CPU & BUS
Tf2 20pF load, 80% to 20% CPU & BUS
Dt
Tj1s1
Tjab1
Tj1s2
20pF load @ VOUT=1.4V
CPU & BUS Clocks;
Load=20pF, FOUT>25 MHz
CPU & BUS Clocks;
Load=20pF, FOUT>25 MHz
Fixed CLK; Load=20pF
Tjab2 Fixed CLK; Load=20pF
Fi
CIN Logic input pins
CINX
ton
ts
Tsk1
X1, X2 pins
From VDD=1.6V to 1 st crossing of 66.5 MHz
VDD supply ramp < 40ms
From 1st crossing of acquisition to <
1% settling
CPU to CPU; Load=20pF; @1.4V
Tsk2 BUS to BUS; Load=20pF; @1.4V
Tsk3 CPU to BUS; Load=20pF; @1.4V
MIN TYP MAX UNITS
-
0.9 1.5
ns
-
0.8 1.4
ns
-
1.5 2.5
ns
-
1.4 2.4
ns
45
50
55
%
-
50 150 ps
-250
-
250
-
1
3
-5
2
5
12.0 14.318 16.0
-
5
-
-
18
-
-
2.5 4.5
ps
%
%
MHz
pF
pF
ms
-
2.0 4.0 ms
-
150 250
ps
-
300 500
ps
1
2.6
5
ns
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
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