ICS9159-14 Datasheet, PDF (2/7 Pages) Integrated Circuit Systems – Frequency Generator and Integrated Buffer for PENTIUM™

ICS9159-14
Pin Descriptions
PIN NUMBER PIN NAME
1, 8, 26
VDD
2
X1
3
4, 11, 23
X2
GND
6, 7, 9, 10
PCLK(0:3)
13, 12
FS(0:1)
14, 20
15, 16, 18 19,
21, 22
17
VDD
BCLK(0:5)
GND
5
OEN
25
USB
28, 27
REF(0:1)
TYPE
PWR
IN
OUT
DESCRIPTION
Power for logic, CPU and fixed frequency output buffers.
XTAL or external reference frequency input. This input includes XTAL load
capacitance and feedback bias for a 12 - 16 MHz crystal, nominally 14.31818 MHz.
XTAL output which includes XTAL load capacitance.
PWR
OUT
IN
PWR
Ground for logic, CPU and fixed frequency output buffers.
Processor clock outputs which are a multiple of the input reference frequency as
shown in the table above.
Frequency multiplier select pins. See table above. These inputs have internal pull-up
devices.
Power for BCLK output buffers.
OUT Bus clock outputs are fixed at one half the PCLK frequency.
PWR
IN
OUT
OUT
Ground for BCLK output buffers.
OEN tristates all outputs when low. This input has an internal pull-up device. 24
DISK OUT The DISK controller clock is fixed at 24 MHz (with 14.318 MHz input).
The USB clock is fixed at 48 MHz (with 14.318 MHz input).
REF is a buffered copy of the crystal oscillator or reference input clock, nominally
14.31818 MHz.
2