ICS844071I Datasheet, PDF (4/10 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO- LVDS CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844071I
FEMTOCLOCKS™ CRYSTAL-TO- LVDS
CLOCK GENERATOR
TABLE 3D. LVDS DC CHARACTERISTICS, V_DD = V_DDA = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
V_OD
Δ V_OD
V_OS
Δ V_OS
Differential Output Voltage
V Magnitude Change
OD
Offset Voltage
V_OS Magnitude Change
Typical
350
40
1.25
50
Maximum
Units
mV
mV
V
mV
TABLE 3E. LVDS DC CHARACTERISTICS, V_DD = V_DDA = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
V_OD
Δ V_OD
V_OS
Δ
V
OS
Differential Output Voltage
V_OD Magnitude Change
Offset Voltage
V_OS Magnitude Change
Typical
350
50
1.2
40
Maximum
Units
mV
mV
V
mV
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
Test Conditions
Minimum Typical Maximum
Fundamental
20.833
28.3
50
7
1
Units
MHz
Ω
pF
mW
TABLE 5A. AC CHARACTERISTICS, V_DD = V_DDA = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
f_OUT
tjit(Ø)
Output Frequency
RMS Phase Jitter ( Random);
NOTE 1
150MHz @ Integration Range:
12kHz - 20MHz
75MHz @ Integration Range:
12kHz - 20MHzz
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
NOTE 1: Please refer to the Phase Noise Plots following this section.
Minimum Typical Maximum Units
62.5
170
MHz
0.75
ps
0.68
ps
300
ps
50
%
TABLE 5B. AC CHARACTERISTICS, V_DD = V_DDA = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
f_OUT
tjit(Ø)
Output Frequency
RMS Phase Jitter ( Random);
NOTE 1
150MHz @ Integration Range:
12kHz - 20MHz
75MHz @ Integration Range:
12kHz - 20MHzz
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
NOTE 1: Please refer to the Phase Noise Plots following this section.
Minimum Typical Maximum Units
62.5
170
MHz
0.96
ps
0.98
ps
300
ps
50
%
844071AGI
www.icst.com/products/hiperclocks.html
REV. A JULY 13, 2005
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