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ICS83054I Datasheet, PDF (4/13 Pages) Integrated Circuit Systems – 4 : 1, SINGLE-ENDED MULTIPLEXER
Integrated
Circuit
Systems, Inc.
ICS83054I
4:1, SINGLE-ENDED MULTIPLEXER
TABLE 4F. LVCMOS/LVTTL DC CHARACTERISTICS, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
VIH
Input High Voltage
VDD = 3.3V ± 5%
2
VDD = 2.5V ± 5%
1.7
VDD + 0.3
V
VDD + 0.3
V
VIL
Input Low Voltage
VDD = 3.3V ± 5%
-0.3
VDD = 2.5V ± 5%
-0.3
0.8
V
0.7
V
IIH
CLK0:CLK3,
Input High Current SEL0, SEL1
VDD = 3.3V or 2.5V ± 5%
OE
VDD = 3.3V or 2.5V ± 5%
150
µA
5
µA
IIL
CLK0:CLK3,
Input Low Current SEL0, SEL1
VDD = 3.3V or 2.5V ± 5%
-5
µA
OE
VDD = 3.3V or 2.5V ± 5%
-150
µA
V = 3.3V ± 5%; NOTE 1
2.6
V
DDO
VOH
Output HighVoltage
VDDO = 2.5V ± 5%; NOTE 1
1.8
V
VDDO = 1.8V ± 5%; NOTE 1
VDD - 0.3
V
VDDO = 3.3V ± 5%; NOTE 1
0.5
V
VOL
Output Low Voltage
VDDO = 2.5V ± 5%; NOTE 1
0.45
V
V = 1.8V ± 5%; NOTE 1
DDO
0.35
V
NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement section, "Load Test Circuit" diagrams.
TABLE 5A. AC CHARACTERISTICS, VDD = VDDO = 3.3V ± 5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
fMAX
tpLH
tpHL
tsk(i)
Output Frequency
Propagation Delay, Low to High; NOTE 1
Propagation Delay, High to Low; NOTE 1
Input Skew; NOTE 2
250
MHz
2.4
2.7
3.0
ns
2.5
2.7
2.9
ns
55
225
ps
tsk(pp) Part-to-Part Skew; NOTE 2, 3
475
ps
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
50
45
500
ps
55
%
MUXISOL MUX Isolation
@ 100MHz
45
dB
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at V /2.
DDO
83054AGI
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4
REV. A JANUARY 3, 2006