ICS83054I Datasheet, PDF (2/13 Pages) Integrated Circuit Systems – 4 : 1, SINGLE-ENDED MULTIPLEXER

Integrated
Circuit
Systems, Inc.
ICS83054I
4:1, SINGLE-ENDED MULTIPLEXER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
Q
Output
Single-ended clock output. LVCMOS/LVTTL interface levels.
3
4, 8,
10, 14
5
7, 9
OE
CLK3, CLK2,
CLK1, CLK0
GND
SEL1, SEL0
Input
Pullup
Output enable. When LOW, outputs are in HIGH impedance state.
When HIGH, outputs are active. LVCMOS / LVTTL interface levels.
Input Pulldown Single-ended clock inputs. LVCMOS/LVTTL interface levels.
Power
Input
Power supply ground.
Pulldown
Clock select input. See Control Input Function Table.
LVCMOS / LVTTL interface levels.
2, 6, 11, 13, 15
nc
Unused
No connect.
12
V
Power
Core and input supply pin.
DD
16
V_DDO
Power
Output supply pin.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R
PULLUP
R_PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
C
PD
Power Dissipation Capacitance
(per output)
R
OUT
Output Impedance
Test Conditions
V_DDO = 3.465V
V = 2.625V
DDO
V_DDO = 1.89V
V_DDO = 3.465V
V_DDO = 2.625V
V_DDO = 1.89V
TABLE 3. CONTROL INPUT FUNCTION TABLE
Control Inputs
SEL1
SEL0
0
0
Input Selected to Q
CLK0
0
1
CLK1
1
0
CLK2
1
1
CLK3
Minimum
Typical
4
51
51
18
20
30
7
7
10
Maximum
Units
pF
kΩ
kΩ
pF
pF
pF
Ω
Ω
Ω
83054AGI
www.icst.com/products/hiperclocks.html
2
REV. A JANUARY 3, 2006