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ICS951901 Datasheet, PDF (3/19 Pages) Integrated Circuit Systems – Programmable Frequency Generator & Integrated Buffers for Pentium III Processor
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ICS951901
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit
Bit 2
Bit 7:4
Bit 3
Bit 1
Bit 0
FS3
FS2
FS1
FS0
CPU
Bit2
Bit7
Bit6
Bit5
Bit4
MHz
0
0
0
0
0
66.67
0
0
0
0
1
66.67
0
0
0
1
0
66.67
0
0
0
1
1
75.00
0
0
1
0
0
83.31
0
0
1
0
1
90.00
0
0
1
1
0
95.00
0
0
1
1
1 100.00
0
1
0
0
0 100.00
0
1
0
0
1 100.00
0
1
0
1
0 105.00
0
1
0
1
1 112.00
0
1
1
0
0 117.99
0
1
1
0
1 124.09
0
1
1
1
0 133.34
0
1
1
1
1 133.34
1
0
0
0
0
75.00
1
0
0
0
1
75.00
1
0
0
1
0
75.00
1
0
0
1
1
83.31
1
0
1
0
0
83.32
1
0
1
0
1
90.00
1
0
1
1
0
90.00
1
0
1
1
1
95.00
1
1
0
0
0
95.00
1
1
0
0
1 105.00
1
1
0
1
0 105.00
1
1
0
1
1 112.00
1
1
1
0
0 117.99
1
1
1
0
1 124.09
1
1
1
1
0 129.99
1
1
1
1
1 140.00
0 - Frequency is selected by hardware select, Latched inputs
1 - Frequency is selected by Bit, 2 7:4
0 - Normal
1 - Spread Spectrum Enabled
0 - Running
1 - Tristate all outputs
Description
SDRAM PCI
MHz
MHz
66.67 33.33
100.00 33.33
133.34 33.33
75.00 37.50
83.31 33.32
90.00 30.00
95.00 31.67
66.67 33.33
100.00 33.33
133.34 33.33
105.00 35.00
112.00 33.60
117.99 35.40
124.09 31.02
100.00 33.33
133.34 33.33
100.00 37.50
112.50 32.14
150.00 32.14
111.07 33.32
166.65 31.25
60.00 30.00
120.00 30.00
63.33 31.67
126.66 31.67
70.00 35.00
140.00 35.00
84.00 33.60
88.49 35.40
93.07 31.02
97.49 32.50
105.00 35.00
AGP1
SEL=1
66.67
66.67
66.67
75.00
66.64
60.00
63.33
66.67
66.67
66.67
70.00
67.20
70.80
62.05
66.67
66.67
75.00
64.29
64.29
66.64
62.49
60.00
60.00
63.33
63.33
70.00
70.00
67.20
70.80
62.05
64.99
70.00
AGP0
SEL=0
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
Spread %
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
± 0.35% center spread
Note1:
Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3.
Note: PWD = Power-Up Default
PWD
00000
Note1
0
1
0
0670B—07/15/04
I2C is a trademark of Philips Corporation
3
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