ICS93776 Datasheet, PDF (3/8 Pages) Integrated Circuit Systems – Low Cost DDR Phase Lock Loop Zero Delay Buffer

ICS9377 6
Absolute Maximum Ratings
Supply Voltage (VDD & AVDD) . . . . . . . . . . -0.5V to 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V_DD +0.5 V
Ambient Operating Temperature. . . . . . . . . 0°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above
those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
Electrical Characteristics - Input / Supply / Common Output parameters
T_A = 0 - 70°C; Supply Voltage AV_DD, V_DD = 2.50V ± 0.20V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP
Operating Supply Current
I_DD2.5
R_T = 120W, C_L = 12 pF at 100MHz
R_T = 120W, C_L = 12 pF at 133MHz
I_DDPD CL=0 pF
Output High Current
I_OH
V_DD = 2.5V, V_OUT = 1V
-48
Output Low Current
I_OL
V_DD = 2.5V, V_OUT = 1.2V
29
High Impedance
Ouptut Current
I_OZ
V_DD = 2.7V, V_OUT = V_DD or GND
High-level Output Voltage
V_OH
V_DD = min to max, I_OH = -1mA
V_DD = 2.3V, I_OH = -12mA
2
Low-level Output Voltage
Output Capacitance¹
V_OL
C_OUT
V_DD = min to max, I_OH = 1mA
V_DD = 2.3V, I_OH = 12mA
V_I = V_DD or GND
1. Guaranteed by design, not 100% tested in production.
MAX
300
300
100
-29
37
10
0.1
0.4
UNITS
mA
mA
mA
mA
mA
V
V
pF
Recommended Operation Conditions
T_A = 0 - 70°C; Supply Voltage AV_DD, V_DD = 2.50V ± 0.20V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Analog / Core Supply Voltage
Input Voltage Level
AV_DD
V_IN
2.3
2.7
V
2
3
V
0793A—03/08/05
3