ICS93722 Datasheet, PDF (3/6 Pages) Integrated Circuit Systems – Low Cost DDR Phase Lock Loop Zero Delay Buffer

ICS9372 2
Absolute Maximum Ratings
Supply Voltage (VDD & AVDD) . . . . . . . . . . -0.5V to 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V_DD +0.5 V
Ambient Operating Temperature . . . . . . . . . 0°C to +85°C
Case Temperature . . . . . . . . . . . . . . . . . . . . 115°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above
those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
Electrical Characteristics - Input / Supply / Common Output Parameters
T_A = 0 - 70°C; Supply Voltage V_DD = 2.5 V +/-0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP
Input High Current
Input Low Current
Operating Supply Current
Output High Current
Output High Current
I_IH
I_IL
I_DD2.5
I_DDPD
I_OH
I_OL
V_IN = V_DD or GND
V_IN = V_DD or GND
C_L = 0 pF at 133 MHz
C_L = 0 pF
V_DD = 2.3V, V_OUT = 1V
V_DD = 2.3V, V_OUT = 1.2V
275
-43
26
43
High Impedance Output
Current
I_OZ
V_DD = 2.7V, V_OUT = V_DD or GND
Input Clamp Voltage
High-level Output Voltage
Low-level Output Voltage
Input Capacitance¹
Output Capacitance¹
V_IK
V_OH
V_OL
C_IN
C_OUT
I_IN = -18 mA;
V_DD = min to max, I_OH = -1mA
V_DD = 2.3V, I_OH = -12mA
V_DD = min to max, I_OH = 1mA
V_DD = 2.3V, I_OH = 12mA
V_IN = V_DD or GND
V_OUT = V_DD or GND
2.1 2.42
1.87
0.04
0.35
3
1. Guaranteed by design, not 100% tested in production.
MAX
325
100
-18
UNITS
µA
µA
mA
µA
mA
mA
10
µA
V
V
V
0.1
V
0.6
V
pF
pF
0539E—07/18/03
3