ICS9248-134 Datasheet, PDF (3/13 Pages) Integrated Circuit Systems – Frequency Timing Generator for PENTIUM II/III Systems

ICS9248-134
Serial Configuration Command Bitmap
Byte 0: Functionality and frequency select register (Default = 0)
Bit
Bit
2, 7:4
Bit 3
Bit 1
Bit 0
Bit 2
FS4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Bit 7
FS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Bit 6
FS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Bit 5
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Description
Bit 4
FS0
CPU
0
103.00
1 105.00
0
100.45
1 100.90
0
107.10
1
109.00
0
112.00
1 114.00
0
116.00
1 118.00
0
133.30
1 120.00
0
122.00
1 125.00
0
128.21
1 130.00
0
132.00
1 133.90
0
138.00
1 142.00
0
146.00
1 150.00
0
153.00
1 156.00
0
159.00
1 162.00
0
165.00
1 168.00
0
171.00
1 174.00
0
177.00
1
180.00
CPU/2
51.50
52.50
50.225
50.45
53.550
54.50
56.00
57.00
58.00
59.00
66.65
60.00
61.00
62.50
64.105
65.00
66.00
66.95
69.00
71.00
73.00
75.00
76.50
78.00
79.50
81.00
82.50
84.00
85.50
87.00
88.50
90.00
0 - Frequency is selected by hardware select, latched inputs
1 - Frequency is selected by Bit 2, 7:4
0 - Spread Spectrum disabled
1 - Spread spectrum enabled
0 - Running
1 - Tristate all outputs
PCI
34.33
35.00
33.483
33.63
35.700
36.33
37.34
28.50
29.00
29.50
33.33
30.00
30.50
31.25
32.05
32.50
33.00
33.48
34.50
35.50
36.50
37.50
38.25
39.00
39.75
40.50
41.25
42.00
42.75
43.50
44.25
45.00
3V66
68.67
70.00
66.967
67.27
71.400
72.67
74.67
57.00
58.00
59.00
66.65
60.00
61.00
62.50
64.105
65.00
66.00
66.95
69.00
71.00
73.00
75.00
76.50
78.00
79.50
81.00
82.50
84.00
85.50
87.00
88.50
90.00
IOAPIC
17.17
17.50
16.742
16.82
17.850
18.17
18.67
14.25
14.50
14.75
16.66
15.00
15.25
15.63
16.026
16.25
16.50
16.74
17.25
17.75
18.25
18.75
19.13
19.50
19.88
20.25
20.63
21.00
21.38
21.75
22.13
22.50
PWD
Reserved
Note 1
0
1
0
Note 1:
Default at power-up will be latched logic inputs to define frequency, as displayed by Bit 1.
3