ICS9148-25 Datasheet, PDF (3/13 Pages) Integrated Circuit Systems – Pentium/Pro System and Cyrix Clock Chip

ICS9148-25
Mode Pin - Power Management Input Control
MODE, Pin 6
Pin 26
Pin 27
0
PCI_STOP#
Input
CPU_STOP#
Input
1
SDRAM7 Output
SDRAM 6
Output
Power Management Functionality
CPU_STOP# PCI_STOP#
PD#
CPUCLK
Outputs
PCICLK(0:5)
Outputs
PCICLK_F,
REF,
24/48MHz
and SDRAM
X
X
0
Stopped Low Stopped Low Stopped Low
0
0
1
Stopped Low Stopped Low
Running
0
1
1
Stopped Low
Running
Running
1
0
1
Running
Stopped Low
Running
1
1
1
Running
Running
Running
Crystal
OSC
Off
Running
Running
Running
Running
VCO
Off
Running
Running
Running
Running
Spread Spectrum Functionality
Latched Pin 1
SSM1
0
Latched Pin 9
SSM0
0
0
1
1
0
1*
1*
CPU, SDRAM
and PCICLOCKS
Normal, steady
frequency mode
Frequency modulated in
center spread ±2.0%
Frequency modulated in
center spread ±1.0%
Frequency modulated in
center spread ±0.5%
*default with internal pull-ups
REF, IOAPIC
14.318MHz
14.318MHz
14.318MHz
14.318MHz
24MHz
24MHz
24MHz
24MHz
24MHz
48MHz
48MHz
48MHz
48MHz
48MHz
CPU 3.3_2.5V Buffer selector for CPUCLK and IOAPIC drivers.
CPU3.3_2.5#
Latched Input Level
0
1
Buffer Selected for
Operation at:
2.5V VDD
3.3V VDD
3