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ICS9148-25 Datasheet, PDF (2/13 Pages) Integrated Circuit Systems – Pentium/Pro System and Cyrix Clock Chip
ICS9148-25
Pin Descriptions
PIN NUMBER
1
2
3, 10, 17, 24,
31, 37, 43
4
5
6
7,15
8
9
11, 12, 13, 14, 16
18
19
20
21
22
23
25
26
27
28,34
29, 30, 32, 33, 35, 36
38, 39, 41, 42
40
44
45
46
47
48
PIN NAME
SSM1
REF1
REF0
GND
X1
X2
MODE
VDD2
PCICLK_F
PCICLK0
SSM0
PCI_CLK (1:5)
FS0
FS1
FS2
VDD4
48MHz
24MHz
VDD
SDRAM7
PCI_STOP#
SDRAM6
CPU_STOP#
VDD3
SDRAM (0:5)
CPUCLK (0:3)
VDD2
PD#
IOAPIC
VDDL1
CPU3.3_2.5#
REF2
VDD1
TYPE
IN
OUT
OUT
PWR
IN
OUT
IN
PWR
OUT
OUT
IN
OUT
IN
IN
IN
PWR
OUT
OUT
PWR
OUT
IN
OUT
IN
PWR
OUT
OUT
PWR
IN
OUT
PWR
IN
OUT
PWR
DESCRIPTION
Latched input for Spread Spectrum modulation amount
(see table)*
Reference clock output
Reference clock output
Ground (common)
Crystal or reference input, nominally 14.318 MHz. Includes
internal load cap to GND and feedback resistor from X2.
Crystal output, includes internal load cap to GND.
Input function selection for Power Management pins*
Supply for PCICLK_F, and PCICLK (0:5)
Free running PCI clock, not affected by PCI_STOP#
PCI clocks
Latched input for Spread Spectrum modulation amount
(see table)*
PCI clocks
Frequency select 0 input*
Frequency select 1 input*
Frequency select 2 input*
Supply for 48MHz and 24MHz clocks
48MHz driver output for USB clock
24MHz driver output for Super I/O
Supply for PLL core
SDRAM clock
Halts PCI Bus (0:5) at next logic "0" level when low*
SDRAM clock
Halts CPU clocks at next logic "0" level when low*
Supply for SDRAM (0:5), SDRAM6/CPU_STOP#,
SDRAM7/PCI_STOP
SDRAMs clock at CPU speed
CPUCLK clock output, powered by VDDL2
Supply for CPUCLK (0:3)
Powers down chip, active low*
IOAPIC clock output, powered by VDDL1, at crystal
frequency
Supply for IOAPIC
Latched 3.3 or 2.5 VDD buffer strength selection* (see table)
Reference clock output
Supply for REF (0:2), X1, X2
*Internal pull-up resistor of 120 to 150K to 3.3V on indicated inputs.
Functionality
VDD = 3.3V ±5% VDDL = 2.5V ±5% or 3.3V ±5%, TA = 0 to 70°C
Crystal (X1, X2) = 14.31818 MHz
FS2
FS1
CPUCLK,
FS0 SDRAM
(MHz)
PCICLK
(MHz)
0
0
0
83.3
1/2 CPU
0
0
1
75
30 (CPU/2.5)
0
1
0
83.3 33.3 (CPU/2.5)
0
1
1
68.5
1/2 CPU
1
0
0
55
1/2 CPU
1
0
1
75
1/2 CPU
1
1
0
60
1/2 CPU
1
1
1
66.8
1/2 CPU
2