ICS9148-25 Datasheet, PDF (12/13 Pages) Integrated Circuit Systems – Pentium/Pro System and Cyrix Clock Chip

ICS9148-25
General Layout Precautions:
1) Use a ground plane on the top layer
of the PCB in all areas not used by
traces.
2) Make all power traces and vias as
wide as possible to lower inductance.
Notes:
1) All clock outputs should have series
terminating resistor. Not shown in
all places to improve readibility of
diagram.
2) 47 ohm / 56pf RC termination
should be used on all over 50MHz
outputs.
3) Optional crystal load capacitors are
recommended.
Connections to VDD:
12