ICS8725 Datasheet, PDF (3/7 Pages) Integrated Circuit Systems – DIFFERENTIAL-TO-LVHSTL ZERO DELAY BUFFER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8725
1-TO-5
DIFFERENTIAL-TO-LVHSTL ZERO DELAY BUFFER
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLUP
RPULLDOWN
Parameter
Input
Capacitance
Input
Pullup Resistor
Input
Pulldown Resistor
REF_CLK1,
nREF_CLK1,
REF_CLK2,
nREF_CLK2,
FB_IN, nFB_IN
DIV_SEL0,
DIV_SEL1,
REF_SEL,
REF_DIV
PLL_SEL, MR
Test Conditions
Minimum Typical Maximum Units
TBD
pF
TBD
pF
51
KΩ
51
KΩ
TABLE 3. CONTROL INPUTS FUNCTION TABLE
DIV_SEL1
0
0
1
1
DIV_SEL0
0
1
0
1
FREQUENCY (MHz)
MINIMUM
MAXIMUM
250
250
125
250
62.5
125
31.25
62.5
TABLE 4. PLL INPUT REFERENCE CHARACTERISTICS, VDDI=VDDA=3.3V±5%, VDDO=1.8V±5%, TA=0°C TO 70°C
Symbol
fREF
tR
tF
tDC
Parameter
Input Reference Frequency
Input Rise Time
Input Fall Time
Input Reference Duty Cycle
Test Conditions
Measured at 20% to 80% points
Measured at 20% to 80% point
Minimum
20
TBD
Typical
Maximum
250
TBD
TBD
TBD
Units
MHz
ns
ns
%
8725
www.icst.com/products/hiperclocks.html
3
REV. A MARCH 5, 2001