ICS627-01 Datasheet, PDF (3/4 Pages) Integrated Circuit Systems – HDTV Set-Top Clock Source

PRELIMINARY INFORMATION
ICS627-01
HDTV Set-Top Clock Source
Electrical Specifications
Parameter
Conditions
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Referenced to GND
Inputs and Clock Outputs
Referenced to GND
Ambient Operating Temperature
Soldering Temperature
Max of 10 seconds
Storage temperature
DC CHARACTERISTICS (VDD = 3.3V unless noted)
Operating Voltage, VDD
Input High Voltage, VIH
Input Low Voltage, VIL
Input High Voltage, VIH, ICLK and CLKIN
Input Low Voltage, VIL, ICLK and CLKIN
Output High Voltage, VOH
IOH=-12mA
Output Low Voltage, VOL
IOL=12mA
Output High Voltage, VOH, CMOS level
IOH=-8mA
Operating Supply Current, IDD
No Load, note 2
Short Circuit Current
Each output
Input Capacitance
Frequency synthesis error
All clocks
AC CHARACTERISTICS (VDD = 3.3V unless noted)
Input Frequency
Output Clock Rise Time
0.8 to 2.0V
Output Clock Fall Time
2.0 to 0.8V
Output Clock Duty Cycle
At VDD/2
Maximum Absolute Jitter, short term
Minimum Typical Maximum Units
7
V
-0.5
VDD+0.5
V
0
70
°C
260
°C
-65
150
°C
3.15
3.30
3.45
V
2
V
0.8
V
(VDD/2)+1 VDD/2
V
VDD/2 (VDD/2)-1 V
2.4
V
0.4
V
VDD-0.4
V
TBD
mA
±50
mA
7
pF
0
ppm
27.0
MHz
1.5
ns
1.5
ns
40
60
%
TBD
ps
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With all clocks at highest MHz.
External Components
The ICS627-01 requires a minimum number of external components for proper operation. Use a low
inductance ground plane, connect all GNDs to this. Connect 0.01µF decoupling caps across pins 5 and 10, 8
and 10, and 22 and 20, as close to the ICS627-01 as possible. A series termination resistor of 33 Ω may be
used for each clock output. The 27.000 MHz crystal must be connected as close to the chip as possible. The
crystal should be a fundamental mode, parallel resonant. Crystal capacitors should be connected from pins X1
to ground and X2 to ground. The value of these capacitors is given by the following equation, where C_L is the
crystal load capacitance: Crystal caps (pF) = (C_L-6) x 2. So for a crystal with 16pF load capacitance, two 20pF
caps should be used. If a clock input is used, drive it into X1 and leave X2 unconnected.
MDS 627-01 B
3
Revision 051600
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