ICS627-01 Datasheet, PDF (1/4 Pages) Integrated Circuit Systems – HDTV Set-Top Clock Source

PRELIMINARY INFORMATION
ICS627-01
HDTV Set-Top Clock Source
Description
The ICS627-01 is a low cost, low jitter, high
performance clock synthesizer which can generate
frequencies required for HDTV receivers and set-
top boxes. Using ICS’s patented analog/digital
Phase-Locked Loop (PLL) techniques, the device
uses an inexpensive fundamental 27 MHz crystal
input to produce low jitter HDTV pixel clocks. It
has a separate input for a 1001/1000 or
2(1001/1000) conversion from a 13.5 MHz,
27 MHz or 54 MHz input.
Features
• Packaged in 28 pin SSOP (QSOP)
• HDTV frequencies of 74.25 and 74.175824 MHz
• Provides selectable B clock for 27.027 MHz or
other 1001/1000
• Uses a fundamental 27 MHz crystal or clock input
• All frequencies are generated exactly (zero ppm
synthesis error)
• Full CMOS output swings with 12 mA output
drive capability at TTL levels
• Advanced, low power, sub-micron CMOS process
• 3.3 V ±5% operating supply
Block Diagram
VDD
GND
CLKIN
SB
SA2:0
6
X1/ICLK
27.0 MHz
crystal or
clock
X2
input
Crystal
Oscillator
x1001/1000
PLL
Output
Buffer
PLL
Clock
Synthesis
Circuitry
Output
Buffer
Output
Buffer
÷2
Output
Buffer
Output
Buffer
CLKB
CLKA
CLKC
(54 MHz)
CLKC/2
(27 MHz)
REFOUT
(27 MHz)
MDS 627-01 B
1
Revision 051600
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•[phone]tel • www.icst.com