ICS348-22 Datasheet, PDF (3/8 Pages) Integrated Circuit Systems – Quad PLL Field Programmable VersaClock Synthesizer

PRELIMINARY INFORMATION
ICS348-22
Quad PLL Field Programmable VersaClock Synthesizer
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin
Name
X1
S0
S1
CLK9
VDD
GND
CLK1
CLK2
CLK3
CLK4
CLK8
CLK7
CLK6
CLK5
GND
VDD
S2
PDTS
VDD
X2
Pin
Type
XI
Input
Input
Output
Power
Power
Output
Output
Output
Output
Output
Output
Output
Output
Power
Power
Input
Input
Power
XO
Pin Description
Crystal Input. Connect this pin to a 25 MHz crystal.
Select pin 0. Internal pull-up resistor.
Select pin 1. Internal pull-up resistor.
127 MHz output clock. Weak internal pull-down when tri-state.
Connect to +3.3 V.
Connect to ground.
127 MHz output clock. Weak internal pull-down when tri-state.
127 MHz output clock. Weak internal pull-down when tri-state.
127 MHz output clock. Weak internal pull-down when tri-state.
127 MHz output clock. Weak internal pull-down when tri-state.
189 MHz output clock. Weak internal pull-down when tri-state.
187 MHz output clock. Weak internal pull-down when tri-state.
187 MHz output clock. Weak internal pull-down when tri-state.
127 MHz output clock. Weak internal pull-down when tri-state.
Connect to ground.
Connect to +3.3 V.
Select pin 2. Internal pull-up resistor.
Power down tri-state. Powers down entire chip and tri-states clock outputs
when low. Internal pull-up resistor.
Connect to +3.3 V.
Crystal Output. Connect this pin to a fundamental crystal. Float for clock input.
MDS 348-22 A
3
Revision 120704
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