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82P33741 Datasheet, PDF (3/12 Pages) Integrated Circuit Systems – Differential reference inputs
FUNCTIONAL BLOCK DIAGRAM
LOS0 / XO_FREQ0
LOS1 / XO_FREQ1
LOS2 / XO_FREQ2
LOS3
IN1(P/N)
IN2(P/N)
IN3(P/N)
IN4(P/N)
IN5(P/N)
IN6(P/N)
IN7
IN8
IN9
IN10
IN11
IN12
System Clock
SYS PLL
APLL1
Reference
monitors
Reference
selection
Frac-N input
dividers
DPLL1
DPLL2
DPLL3
APLL2
APLL3
(VCXO)
ex_sync module
I2C Master
I2C Slave
Control and
Status
Registers
JTAG
Crystal
Figure 1. Functional Block Diagram
82P33741 SHORT FORM DATA SHEET
OutDiv
OutDiv
OutDiv
OutDiv
OutDiv
OutDiv
OutDiv
OUT1
OUT2
OUT3p/n
OUT4p/n
OUT5p/n
OUT6p/n
OUT7
OutDiv
OutDiv
OutDiv
OutDiv
OUT8
OUT9
OUT10p/n
OUT11p/n
FRSYNC_8K_1PPS
MFRSYNC_2K_1PPS
REVISION 1 09/23/14
3
PORT SYNCHRONIZER FOR IEEE 1588 AND
10G/40G SYNCHRONOUS ETHERNET
I