M1010-01 Datasheet, PDF (2/8 Pages) Integrated Circuit Systems – VCSO BASED CLOCK JITTER ATTENUATOR

Integrated
Circuit
Systems, Inc.
M1010-01
VCSO BASED CLOCK JITTER ATTENUATOR
Preliminary Information
DETAILED BLOCK DIAGRAM
DIF_REF0
nDIF_REF0
DIF_REF1
nDIF_REF1
M1010
MUX
0
1
REF_SEL
R Div
R_LOOP C_LOOP
R_LOOP C_LOOP
R_POST
R_POST
C_POST
C_POST
OP_IN nOP_IN OP_OUT nOP_OUT nVC VC
Phase
Detector
R_IN
R_IN
Loop Filter
Amplifier
Phase
Locked
Loop
(PLL)
M Div
Mfin Divider
External
Loop Filter
Components
SAW Delay Line
Phase
Shifter
VCSO
3
SEL2:0
2
FIN_SEL1:0
Divider LUT
Mfin Divider
LUT
FOUT
nFOUT
PIN DESCRIPTIONS
Figure 3: Detailed Block Diagram
Number
Name
1, 2, 3, 10, 14, 26 GND
I/O Configuration
Ground
Description
Power supply ground connections.
4
9
OP_IN
nOP_IN
Input
5
8
nOP_OUT
OP_OUT
Output
6
7
nVC
VC
Input
External loop filter connections.
See Figure 4, External Loop Filter, on pg. 4.
11, 18, 19, 33
VCC
Power
Power supply connection, connect to +3.3V.
12, 13, 17, 25, 32
15
16
20
21
NC
FOUT
nFOUT
nDIF_REF1
DIF_REF1
No internal connection.
Output No internal terminator Clock output pairs. Differential LVPECL.
Input
Internal pull-UP resistor¹ _{Reference clock input pair.}
Internal pull-down resistor^{1 Differential LVPECL or LVDS.}
22
REF_SEL
Input
Internal pull-down resistor¹
Reference clock input selection. LVCMOS/LVTTL:
Logic 1 selects DIF_REF1, nDIF_REF1.
Logic 0 selects DIF_REF0, nDIF_REF0.
23
24
nDIF_REF0
DIF_REF0
Input
Internal pull-UP resistor¹ _{Reference clock input pair.}
Internal pull-down resistor^{1 Differential LVPECL or LVDS.}
27
28
FIN_SEL1
FIN_SEL0
Input clock frequency selection. LVCMOS/LVTTL.
Input Internal pull-down resistor¹ See Table 3, Mfin (Frequency Input) Divider Look-Up Table
(LUT) on pg. 3.
29
30
31
SEL0
SEL1
SEL2
Input
Internal pull-UP resistor¹
M and R divider value selection. LVCMOS/ LVTTL.
See Table 4, SEL2:0 Look-up Table (LUT) on pg. 3.
34, 35, 36
DNC
Do Not Connect.
Table 2: Pin Descriptions
Note 1: For typical values of internal pull-down and pull-up resistors, see “Inputs with Pull-down” and “Inputs with Pull-up”
in Table 8, DC Characteristics, on pg. 6.
M1010-01 Datasheet Rev 0.4
2 of 8
Revised 29Sep2003
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