ICS840002I-01 Datasheet, PDF (2/12 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
ICS840002I-01
FEMTOCLOCKS™ CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Number
1, 16
Name
F_SEL0,
F_SEL1
2
nXTAL_SEL
Type
Description
Input Pullup Frequency select pin. LVCMOS/LVTTL interface levels.
Input
Selects between the crystal or TEST_CLK inputs as the PLL reference
Pulldown source. When HIGH, selects TEST_CLK. When LOW, selects XTAL
inpus. LVCMOS/LVTTL interface levels.
3
TEST_CLK
Input Pulldown Single-ended LVCMOS/LVTTL clock input.
4
OE
Input
Pullup
Output enable pin. When HIGH, the outputs are active. When LOW, the
outputs are in a high impedance state. LVCMOS/LVTTL interface levels.
Active HIGH Master Reset. When logic HIGH, the internal dividers are
5
MR
Input Pulldown reset causing active outputs to go low. When logic LOW, the internal
dividers and the outputs are enabled. LVCMOS/LVTTL interface levels.
PLL Bypass. When LOW, the output is driven from the VCO output.
6
nPLL_SEL
Input
Pulldown
When HIGH, the PLL is bypassed and the output frequency =
reference clock frequency/N output divider.
LVCMOS/LVTTL interface levels.
7
V_DDA
Power
8
V_DD
Power
9,
10
XTAL_OUT,
XTAL_IN
Input
Analog supply pin.
Core supply pin.
Crystal oscillator interface.
11
12, 13
V_DDO
Q1, Q0
Power
Output
Output supply pin.
Single-ended clock outputs. LVCMOS/LVTTL interface levels.
14, 15
GND
Power
Power supply ground.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
C_PD
R_PULLUP
R_PULLDOWN
Parameter
Input Capacitance
Power Dissipation Capacitance
Input Pullup Resistor
Input Pulldown Resistor
R_OUT
Output Impedance
Test Conditions
3.3V±5%
2.5V±5%
Minimum
14
16
Typical
4
8
51
51
17
21
Maximum
21
25
Units
pF
pF
kΩ
kΩ
Ω
Ω
840002AGI-01
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2
REV. A MARCH 3, 2005