ICS83054I-01 Datasheet, PDF (2/12 Pages) Integrated Circuit Systems – 4-BIT, 2 : 1, SINGLE-ENDED MULTIPLEXER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS83054I-01
4-BIT, 2:1,
SINGLE-ENDED MULTIPLEXER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 6
11, 16
SEL3, SEL2,
SEL1, SEL0
Input
Pulldown
Clock select inputs. See Control Input Function Table.
LVCMOS / LVTTL interface levels.
2, 5, 9, 12, 15 Q3, Q2, Q1, Q0 Output
Single-ended clock output. LVCMOS/LVTTL interface levels.
3, 14
4, 13
V_DDO
GND
Power
Power
Output supply pins.
Power supply ground.
7, 10
CLK1, CLK0 Input Pulldown Single-ended clock inputs. LVCMOS/LVTTL interface levels.
8
V_DD
Power
Core supply pin.
9
OE
Input
Pullup
Output enable. When LOW, outputs are in HIGH impedance state.
When HIGH, outputs are active. LVCMOS / LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R_PULLUP
R
PULLDOWN
C_PD
R_OUT
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Power Dissipation Capacitance
(per output)
Output Impedance
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
KΩ
KΩ
11
pF
15
Ω
TABLE 3. CONTROL INPUT FUNCTION TABLE
SEL3
0
0
0
1
1
1
Control Inputs
SEL2
SEL1
0
0
0
0
0
1
•
•
•
1
0
1
1
1
1
SEL0
0
1
0
1
0
1
Q3
CLK0
CLK0
CLK0
CLK1
CLK1
CLK1
Outputs
Q2
Q1
CLK0
CLK0
CLK0
CLK0
CLK0
CLK1
•
•
•
CLK1
CLK0
CLK1
CLK1
CLK1
CLK1
Q0
CLK0
CLK1
CLK0
CLK1
CLK0
CLK1
83054AGI-01
www.icst.com/products/hiperclocks.html
2
REV. A NOVEMBER 24, 2004