ICS83940D Datasheet, PDF (15/15 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS83940D
LOW SKEW, 1-TO-18
LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER
Rev Table
T5A
A
T5B
T5C
T2
A
T1
T2
T5A
B ^{T5B T5C}
B ^{T5A - T5C}
Page
4
5
6
2
7
2
2
4
5
6
7
10
11
1
4-6
11
14
REVISION HISTORY SHEET
Description of Change
3.3V AC Characteristics table -
• tsk(pp) Test Conditions, replaced "<" with " ≤ "; corrected Units to "ns" from "ps".
• odc - corrected Test Conditions to read "134MHz ≤ f ≤ 250MHz", from
"f ≤ 250MHz".
3.3V/2.5V AC Characteristics table - tsk(pp) Test Conditions,
replaced "<" with " ≤ "; corrected Units to read "ns" from "ps".
2.5V AC Characteristics table - tsk(pp) Test Conditions,
replaced "<" with " ≤ "; corrected Units to "ns" from "ps".
Pin Characteristics table - changed R_OUT 25Ω maximum to 28Ω maximum.
Delete R_PULLUP row.
3.3V Output Load AC Test Circuit diagram - corrected GND equation to read
-1.65V... from -1.165V...
Added LVTTL to title.
Updated format.
Pin Description Table - added Pullup and Pulldown to Pin 6, nPCLK.
Pin Characteristics Table - added R_PULLUP row.
Added tjit row.
Added tjit row.
Added tjit row.
Added Additive Phase Jitter section.
Updated Single Ended Signal Driving Differential Input diagram.
Added LVPECL Clock Interface section.
Added "Lead-Free" bullet to Features section.
Added NOTE 7.
Updated LVPECL Clock Input Interface section.
Ordering Information table - added "Lead-Free" part number.
Date
10/11/02
12/12/02
10/9/03
6/15/04
83940DY
www.icst.com/products/hiperclocks.html
15
REV. B JUNE 15, 2004