ICS952606 Datasheet, PDF (14/20 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for Next Gen P4 processor

Integrated
Circuit
Systems, Inc.
ICS952606
I²C Table: Byte Count Register
Byte 8
Pin #
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
I²C Table: Reserved
Byte 9
Pin #
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Name
BC7
BC6
BC5
BC4
BC3
BC2
BC1
BC0
Name
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Control Function
Writing to this register
will configure how
many bytes will be read
back, default is 08 = 8
bytes.
Type
RW
RW
RW
RW
RW
RW
RW
RW
Control Function
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Type
-
-
-
-
-
-
-
-
0
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
1
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
PWD
0
0
0
0
1
0
0
0
PWD
X
X
X
X
X
X
X
X
I²C Table: Reserved
Byte 10
Pin #
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Name
M/N prog Enable
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Control Function
M/N prog Enable
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Type
-
-
-
-
-
-
-
-
0
1
Disable Enable
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
PWD
0
X
X
X
X
X
X
X
I²C Table: VCO Frequency Control Register
Byte 11
Pin #
Name
Bit 7
-
N Div8
Bit 6
-
M Div6
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
M Div5
M Div4
M Div3
M Div2
M Div1
M Div0
Control Function
Type
0
N Divider Bit 8
RW
-
The decimal
RW
-
representation of M Div
(6:0) is equal to
RW
RW
-
-
reference divider value. _RW
-
Default at power up =
RW
-
latch-in or Byte 0 Rom
RW
-
table.
RW
-
1
PWD
-
X
-
X
-
X
-
X
-
X
-
X
-
X
-
X
0717F—06/10/05
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