ICS950703 Datasheet, PDF (14/24 Pages) Integrated Circuit Systems – PROGRAMMABLE TIMING CONTROL HUB FOR P4

Integrated
Circuit
Systems, Inc.
ICS950703
I²C Table: Byte Count Register
Byte 8
Pin #
Name
Bit 7
-
BC7
Bit 6
-
BC6
Bit 5
-
BC5
Bit 4
-
BC4
Bit 3
-
BC3
Bit 2
-
BC2
Bit 1
-
BC1
Bit 0
-
BC0
Control Function
Writing to this
register will
configure how many
bytes will be read
back, default is 0F_H =
15 bytes.
Type
RW
RW
RW
RW
RW
RW
RW
RW
I²C Table: Watchdog Timer Register
Byte 9
Pin #
Name
Bit 7
-
WD7
Bit 6
-
WD6
Bit 5
-
WD5
Bit 4
-
WD4
Bit 3
-
WD3
Bit 2
-
WD2
Bit 1
-
WD1
Bit 0
-
WD0
Control Function
These bits represent
X*290ms the
watchdog timer will
wait before it goes to
alarm mode. Default
is 10*290ms = 2.9
seconds.
Type
RW
RW
RW
RW
RW
RW
RW
RW
I²C Table: VCO Control Select Bit & WD Timer Control Register
Byte 10
Pin #
Name
Control Function
Bit 7
-
M/NEN
M/N Programming
Enable
Bit 6
-
WD Enable
WD Enable
Bit 5
-
WD SF Mode
WD Safe Frequency
Mode
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
WDSF4
WDSF3
WDSF2
WDSF1
WDSF0
Writing to these bit
will configure the
safe frequency as
Byte 0 Bit (4:0)
Type
RW
RW
RW
RW
RW
RW
RW
RW
I²C Table: VCO Frequency Control Register
Byte 11
Pin #
Name
Control Function
Bit 7
-
Bit 6
-
NDiv8
MDiv6
N Divider Bit 8
The decimal
Bit 5
-
MDiv5
representation of M
Bit 4
-
MDiv4
Div (6:0) + 2 is equal
Bit 3
-
MDiv3
to reference divider
Bit 2
-
MDiv2
value. Default at
Bit 1
-
MDiv1
power up = latch-in
Bit 0
-
MDiv0
or Byte 0 Rom table.
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
PWD
-
-
0
-
-
0
-
-
0
-
-
0
-
-
1
-
-
1
-
-
1
-
-
1
0
1
PWD
-
-
0
-
-
0
-
-
0
-
-
0
-
-
1
-
-
0
-
-
1
-
-
0
0
Disable
Disable
Latched
Inputs
-
-
-
-
-
1
Enable
Enable
B10
Bit(4:0)
-
-
-
-
-
PWD
0
0
0
0
0
0
0
0
0
1
PWD
-
-
X
-
-
X
-
-
X
-
-
X
-
-
X
-
-
X
-
-
X
-
-
X
0690D—05/14/04
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