ICS8737-11 Datasheet, PDF (10/13 Pages) Integrated Circuit Systems – LOW SKEW ÷1/÷2 DIFFERENTIAL-TO- 3.3V LVPECL CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
ICS8737-11
LOW SKEW ÷1/÷2
DIFFERENTIAL-TO- 3.3V LVPECL CLOCK GENERATOR
3. Calculations and Equations.
LVPECL output driver circuit and termination are shown in Figure 10.
V_CC
Q1
V_OUT
RL
50
V_CC - 2V
FIGURE 10 - LVPECL DRIVER CIRCUIT AND TERMINATION
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage of V - 2V.
CC
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
– (V
- 2V))/R ] * (V
-V
)
OH_MAX
CC_MAX
L
CC_MAX OH_MAX
Pd_L = [(V
– (V
- 2V))/R ] * (V
-V )
OL_MAX
CC_MAX
L
CC_MAX OL_MAX
• For logic high, V = V
=V
– 1.0V
OUT
OH_MAX
CC_MAX
Using V
= 3.465, this results in V
= 2.465V
CC_MAX
OH_MAX
• For logic low, V = V = V – 1.7V
OUT
OL_MAX
CC_MAX
Using V
= 3.465, this results in V
= 1.765V
CC_MAX
OL_MAX
Pd_H = [(2.465V - (3.465V - 2V))/50 Ω] * (3.465V - 2.465V) = 20.0mW
Pd_L = [(1.765V - (3.465V - 2V))/50 Ω] * (3.465V - 1.765V) = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW
8737AG-11
www.icst.com/products/hiperclocks.html
10
REV. A JULY 13, 2001