ICS843034-01 Datasheet, PDF (10/22 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ MULTI-RATE LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843034-01
FEMTOCLOCKS™
MULTI-RATE LVPECL FREQUENCY SYNTHESIZER
TABLE 7B. AC CHARACTERISTICS, V_CC = V_CCA = 3.3V±5%, V_{CCO_A} = V_{CCO_B} = 2.5V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical
F_OUT
tjit(Ø)
Output Frequency
Phase Jitter, RMS (Random);
NOTE 1
Integration Range:
637kHz - 5MHz
30.625
0.71
tsk(o) Output Skew; NOTE 2, 3
50
t_R / t_F
Output Rise/Fall Time
M, N to nP_LOAD
20% to 80%
200
5
t_S
Setup Time S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
M, N to nP_LOAD
5
t_H
Hold Time S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
odc
Output Duty Cycle
50
t_LOCK
PLL Lock Time
See Parameter Measurement Information section.
NOTE 1: Please refer to the Phase Noise Plot.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Maximum
640
700
1
Units
MHz
ps
ps
ps
ns
ns
ns
ns
ns
ns
%
ms
TABLE 7C. AC CHARACTERISTICS, V_CC = V_CCA = 3.3V±5%, V_{CCO_A} = 3.3V±5%, V_{CCO_B} = 2.5V±5%,TA = 0°C TO 70°C OR
V_CC = V_CCA = 3.3V±5%, V_{CCO_A} = 2.5V±5%, V_{CCO_B} = 3.3V±5%,TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
F_OUT
tjit(Ø)
Output Frequency
Phase Jitter, RMS (Random);
NOTE 1
Integration Range:
637kHz - 5MHz
35
700
0.71
tsk(o) Output Skew; NOTE 2, 3
50
t_R / t_F
Output Rise/Fall Time
20% to 80%
200
700
M, N to nP_LOAD
5
t_S
Setup Time S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
M, N to nP_LOAD
5
t_H
Hold Time S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
odc
Output Duty Cycle
50
t_LOCK
PLL Lock Time
1
See Parameter Measurement Information section.
NOTE 1: Please refer to the Phase Noise Plot.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Units
MHz
ps
ps
ps
ns
ns
ns
ns
ns
ns
%
ms
843034AY-01
www.icst.com/products/hiperclocks.html
10
REV. C NOVEMBER 28, 2005