9DBU0231 Datasheet, PDF (10/17 Pages) Integrated Circuit Systems – slew rate for each output

9DBU0231 DATASHEET
General SMBus Serial Interface Information
How to Write
• Controller (host) sends a start bit
• Controller (host) sends the write address
• IDT clock will acknowledge
• Controller (host) sends the beginning byte location = N
• IDT clock will acknowledge
• Controller (host) sends the byte count = X
• IDT clock will acknowledge
• Controller (host) starts sending Byte N through Byte
N+X-1
• IDT clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
Index Block Write Operation
Controller (Host)
T
starT bit
Slave Address
IDT (Slave/Receiver)
WR
WRite
Beginning Byte = N
ACK
Data Byte Count = X
Beginning Byte N
ACK
ACK
ACK
O
O
O
O
O
Byte N + X - 1
P
stoP bit
O
ACK
Note: SMBus Address is Latched on SADR pin.
How to Read
• Controller (host) will send a start bit
• Controller (host) sends the write address
• IDT clock will acknowledge
• Controller (host) sends the beginning byte location = N
• IDT clock will acknowledge
• Controller (host) will send a separate start bit
• Controller (host) sends the read address
• IDT clock will acknowledge
• IDT clock will send the data byte count = X
• IDT clock sends Byte N+X-1
• IDT clock sends Byte 0 through Byte X (if X_(H) was
written to Byte 8)
• Controller (host) will need to acknowledge each byte
• Controller (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
Index Block Read Operation
Controller (Host)
T
starT bit
Slave Address
WR
WRite
Beginning Byte = N
RT
Repeat starT
Slave Address
IDT (Slave/Receiver)
ACK
ACK
RD
ReaD
ACK
ACK
ACK
O
O
O
N
Not acknowledge
P
stoP bit
Data Byte Count=X
Beginning Byte N
O
O
O
Byte N + X - 1
2 O/P 1.5V PCIE GEN1-2-3 ZDB/FOB
10
REVISION D 04/22/15