ICS950508 Datasheet, PDF (1/19 Pages) Integrated Circuit Systems – Programmable Timing Control HubTM for PII/IIITTM

Integrated
Circuit
Systems, Inc.
ICS950508
Programmable Timing Control Hub™ for PII/III™
Recommended Application:
810/810E/815 and 815 B-Step type chipset
Output Features:
• 2 - CPUs @ 2.5V
• 13 - SDRAM @ 3.3V
• 3 - 3V66 @ 3.3V
• 8 - PCI @3.3V
• 1 - 24/48MHz@ 3.3V
• 1 - 48MHz @ 3.3V fixed
• 1 - REF @3.3V, 14.318MHz
Features/Benefits:
• Programmable output frequency.
• Programmable output divider ratios.
• Programmable output rise/fall time.
• Programmable output skew.
• Programmable spread percentage for EMI control.
• Watchdog timer technology to reset system
if system malfunctions.
• Programmable watch dog safe frequency.
• Support I²C Index read/write and block read/write
operations.
• Uses external 14.318MHz crystal.
Key Specifications:
Pin Configuration
VDDREF 1
X1 2
X2 3
GND 4
GND 5
3V66_0 6
3V66_1 7
3V66_2 8
VDD3V66 9
VDDPCI 10
1_{*FS0/PCICLK0 11}
1_{*FS1/PCICLK1 12}
1_{*SEL24_48#/PCICLK2 13}
GND 14
PCICLK3 15
PCICLK4 16
PCICLK5 17
VDDPCI 18
PCICLK6 19
PCICLK7 20
GND 21
Vtt_PWRGD/PD# 22
SCLK 23
SDATA 24
VDDSDR 25
SDRAM11 26
SDRAM10 27
GND 28
56 REF0/FS4¹*
55 VDDLAPIC
54 IOAPIC
53 VDDLCPU
52 CPUCLK0
51 CPUCLK1
50 GND
49 GND
48 SDRAM0
47 SDRAM1
46 SDRAM2
45 VDDSDR
44 SDRAM3
43 SDRAM4
42 SDRAM5
41 GND
40 SDRAM6
39 SDRAM7
38 SDRAM_F
37 VDDSDR
36 GND
35 24_48MHz/FS2*
34 48MHZ/FS3*
33 VDD48
32 VDDSDR
31 SDRAM8
30 SDRAM9
29 GND
56-Pin 300-mil SSOP
1. These pins will have 1.5 to 2X drive strength.
* Internal Pull-up resistor of 120K to VDD
• CPU Output Jitter: <250ps
• IOAPIC Output Jitter: <500ps
• 48MHz, 3V66, PCI Output Jitter: <500ps
Block Diagram
• Ref Output Jitter. <1000ps
• CPU Output Skew: <175ps
• PCI Output Skew: <500ps
• 3V66 Output Skew <175ps
PLL2
/2
48MHz
24_48MHz
• For group skew timing, please refer to the
Group Timing Relationship Table.
X1
XTAL
X2
OSC
REF0
PLL1
Spread
Spectrum
FS(4:0)
PD#
SEL24_48#
Vtt_PWRGD
SDATA
SCLK
Control
Logic
Config.
Reg.
CPU
DIVDER
SDRAM
DIVDER
IOAPIC
DIVDER
PCI
DIVDER
3V66
DIVDER
2 ^{CPUCLK (1:0)}
12 ^{SDRAM (11:0)}
SDRAM_F
IOAPIC
PCICLK (7:0)
8
3V66 (2:0)
3
0470E—04/06/05